If all the inputs of a NAND gate are connected together then the consequential circuit is..................

Question

Accepted Answer

The correct option is (3):
When all the inputs of a NAND gate are connected together and driven by a single input signal, the consequential circuit functions exactly as a **NOT gate**, also commonly known as an inverter. A NAND gate, by definition, first performs a logical AND operation on all its inputs and then inverts the result. If we denote the common input signal as $X$, the Boolean expression for the circuit becomes $Y = \overline{X \cdot X \cdot X \cdot ...}$. According to the fundamental idempotent law of Boolean algebra, the AND operation of a variable with itself is just the variable itself (i.e., $X \cdot X = X$). Therefore, the overall logical function simplifies to $Y = \overline{X}$, which is the precise definition of a NOT gate. This illustrates a key principle in digital logic: a NAND gate is a universal gate because it can be wired to implement the NOT function.

The incorrect option is (1):
A NOR gate implements the function $Y = \overline{A + B + C + ...}$, which is the inverse of the OR function. While a NOR gate with all inputs tied together would also yield a NOT gate function ($Y = \overline{X + X} = \overline{X}$), the original device is a NAND gate. The NAND gate's internal structure and function ($Y = \overline{A \cdot B}$) are distinct from a standard multi-input NOR gate's structure and function ($Y = \overline{A + B}$), even though both can be configured as a NOT gate.

The incorrect option is (2):
An AND gate implements the function $Y = A \cdot B \cdot C \cdot ...$ and would produce $Y = X$ if the inputs are tied together. However, the circuit in the question is a NAND gate, and its output is $Y = \overline{X}$. This means the output is the opposite of what an AND gate would produce for this single-input configuration. Specifically, when the input $X$ is '1', the AND gate yields '1', but the NAND-configured-as-NOT gate yields '0'.

The incorrect option is (4):
This option is incorrect because the resulting circuit *does* correspond to one of the fundamental logic gates listed. By applying the laws of Boolean algebra to the NAND gate with common inputs, the output is definitively established as the complement of the input, which mathematically and functionally proves that the circuit is a NOT gate. Therefore, the result is not "None of the three."